*timing*. If your gate inputs aren't perfectly timed, they'll flat-out fail, often silently. NoTimeAtAll introduces a concept to eliminate this concern: signals wait.

Code: Select all

```
x = 17, y = 17, rule = NoTimeAtAll
3.5A2B2D5A$3.A12.A$3.A12.A$4A2D2C4A4.A$A10.A4.A$A10.A4.A$A10.A4.A$A
10.A4.A$17A$4.A$4.A$4.A$4.A$4.A$4.A$4.2A$4.A!
```

Here are some logic gates, to demonstrate universality:

Code: Select all

```
x = 126, y = 45, rule = NoTimeAtAll
86.3A$86.D.A$86.CAD22.A.A.2A3.A2.2A$16.A.A2.A2.2A62.C16.A5.A.A.A.A.A.
A.A.A$16.A.A.A.A.A.A5.A18.5ABDABDACDACD4.DCADCADBADB5A.19A5.A2.A.A.A.
A.2A$17.A2.A.A.2A5.21A34.3A22.A.A.A.A.A.A.A.A$16.A.A.A.A.A.A24.5ABDAC
DABDACD4.DCADBADCADB5A24.A.A.A.A2.A2.A.A$16.A.A2.A2.A.A6$86.ADC$49.CD
A34.A.A23.A2.2A$16.2A3.A2.3A22.A.A34.DADC15.A5.A.A.A.A$16.A.A.A.A2.A
6.A15.CD2A34.C2.18A4.A.A.2A$16.A.A.A.A2.A5.18A22.DCADCADBADB8A21.A.A.
A.A$16.A.A.A.A2.A22.14ABDACD19.A25.A2.A.A$16.A.A2.A3.A45.DCADBADCADB
5A7$88.3A21.A2.2A2.2A$.A2.2A2.2A6.2A3.A2.3A22.7ABDABDACDACD4.DCADCADB
ADB7A.A14.A5.A.A.A.A.A.A$A.A.A.A.A.A5.A.A.A.A2.A6.A16.A38.A.17A4.3A.A
.A.A.A$3A.A.A.A.A.3A.A.A.A.A2.A5.21A34.5A20.A.A.A.A.A.A$A.A.A.A.A.A5.
A.A.A.A2.A23.A.5ABDACDABDACD4.DCADBADCADB5A.A22.A.A.A.A.2A$A.A.A.A.2A
6.A.A2.A3.A23.3A34.3A5$88.ACD$49.3A36.D.A$49.D.A19.DCADCADBADB6AC2D
20.2A3.A2.2A2.2A$16.2A3.A2.2A23.CAD35.A2.C14.A5.A.A.A.A.A.A.A.A$16.A.
A.A.A.A.A5.A18.C34.3A.17A4.A.A.3A.A.A.A.A$16.A.A.A.A.2A5.25ABDABDACDA
CD19.A.A.A20.A.A.A.A.A.A.A.A$16.A.A.A.A.A.A24.A34.5A20.A.A.A.A.A.A.2A
$16.A.A2.A2.A.A24.5ABDACDABDACD21.A$71.DCADBADCADB7A!
```

Code: Select all

```
x = 15, y = 5, rule = NoTimeAtAll
7.3A$C7A.6A$7.3A$B7A.6A$7.3A!
```

- A wire changes to a head under some logic condition depending on the number of heads. (e.g. 1 <= head_count <= 2 in Wireworld)
- A head
**always**changes to a tail. - A tail
**always**changes to a wire.

- A wire with an adjacent tail
**never**changes to a head. This ensures that signals remain separated. - A wire changes to a head under some logic condition, depending on the number of heads and the number of wire inputs. The state of the head (red vs. green) depends on some function of the surrounding heads.
- A head changes to a tail only if there is no adjacent empty wire.
- A tail changes to a wire only if there is no adjacent head.

Here's the Nutshell file:

Code: Select all

```
@NUTSHELL NoTimeAtAll
by HactarCE
0: blank
1: wire {w}
2: wire 0 {h0}
3: wire 1 {h1}
4: tail {t}
@COLORS
000: 0
336: w
C33: h0
3C3: h1
999: t
@TABLE
states: 5
neighborhood: vonNeumann
h = (h0, h1)
ht = (h, t)
wht = (w, ht)
wt = (w, t)
symmetries: permute
# NEVER put a head where there would be an adjacent tail
w, t, any ~ 3; w
symmetries: rotate4reflect
# Split at T
w, w, h, w, --wht; [2]
symmetries: permute
# Signals wait at intersections
w, w ~ 2, any ~ 2; w
# Sum=1 signal combination
w, h1, h1, any ~ 2; h0
w, h, h0, --h1 ~ 2; [1]
# Signals
w, h, --h ~ 3; [1]
h, --w ~ 4; t
t, --h ~ 4; w
```

Code: Select all

```
@RULE NoTimeAtAll
********************************
**** COMPILED FROM NUTSHELL ****
**** v0.5.6 ****
********************************
by HactarCE
0: blank
1: wire
2: wire 0
3: wire 1
4: tail
@COLORS
0 0 0 0
1 51 51 102
2 204 51 51
3 51 204 51
4 153 153 153
@TABLE
neighborhood: vonNeumann
symmetries: rotate4reflect
n_states: 5
var any.0 = {0,1,2,3,4}
var any.1 = any.0
var any.2 = any.0
var h.0 = {2,3}
var _a0.0 = {0}
var _b0.0 = {0,1,2,4}
var _b0.1 = _b0.0
var _c0.0 = {0,1,4}
var _c0.1 = _c0.0
var _c0.2 = _c0.0
var _c0.3 = _c0.0
var _d0.0 = {0,2,3,4}
var _d0.1 = _d0.0
var _d0.2 = _d0.0
var _d0.3 = _d0.0
1, 4, any.0, any.1, any.2, 1
1, 1, _a0.0, 1, h.0, h.0
1, 1, 1, any.0, any.1, 1
1, 1, any.0, 1, any.1, 1
1, 3, 3, any.0, any.1, 2
1, 3, any.0, 3, any.1, 2
1, 2, _b0.0, _b0.1, h.0, h.0
1, 2, _b0.0, h.0, _b0.1, h.0
1, _c0.0, _c0.1, _c0.2, h.0, h.0
h.0, _d0.0, _d0.1, _d0.2, _d0.3, 4
4, _c0.0, _c0.1, _c0.2, _c0.3, 1
```

EDIT 2020-10-12: fix images by uploading to Imgur, and add RLEs